The way of accessing data is called addressing mode. The CPU can access the data in different ways by using addressing modes. The 8051 microcontroller consists of five addressing modes such as:
1. Immediate Addressing
2. Register Addressing
3. Direct Addressing
4. Register – Indirect Addressing
5. Indexed Addressing
1. Immediate Addressing
In Immediate Addressing mode, the operand, which follows the Opcode, is a constant data of either 8 or 16 bits. The name Immediate Addressing came from the fact that the constant data to be stored in the memory immediately follows the Opcode.
Here the # in the operand indicates that it is a data and not the address of a Register.
2. Register Addressing
Register addressing mode involves the use of registers to hold the data to be manipulated
MOV R0, R1 //Invalid instruction
3. Direct Addressing
In this addressing mode, the source or destination (or both source and destination) must be an address, but not value.
4. Register Indirect Addressing
In the Indirect Addressing Mode or Register Indirect Addressing Mode, the address of the Operand is specified as the content of a Register.
Only R0 and R1 are allowed in Indirect Addressing Mode.
5. Indexed Addressing Mode
This addressing mode is used to read the data from the external memory or ROM memory. With Indexed Addressing Mode, the effective address of the Operand is the sum of a base register and an offset register. The Base Register can be either Data Pointer (DPTR) or Program Counter (PC) while the Offset register is the Accumulator (A).
In Indexed Addressing Mode, only MOVC and JMP instructions can be used. Indexed Addressing Mode is useful when retrieving data from look-up tables.
Example: MOVC A, @A+DPTR
Here, the address for the operand is the sum of contents of DPTR and Accumulator.
Structure of the 8051 Microcontroller Instruction
An instruction is a command to the microcontroller to perform a given task on a specified data. Each instruction has two parts: one is task to be performed, called the operation code (opcode), and the second is the data to be operated on, called the operand. The operand (or data) can be specified in various ways. It may include 8-bit (or 16-bit) data, an internal register, a memory location, or 8-bit (or 16-bit) address.
MNEMONIC DESTINATION ADDRESS, SOURCE ADDRESS
MOV(opcode)R1,#51H(data or operand)
The 8051 instruction set is classified into the following three groups according to word size:
• One-word or 1-byte instructions
• Two-word or 2-byte instructions
• Three-word or 3-byte instructions
1. One-Byte Instructions 8 (opcode + operand)
A 1-byte instruction includes the opcode and operand in the same byte. Operand(s) are internal register and are coded into the instruction.
2. Two-Byte Instructions 8 (opcode) + 8 (operand)
In a two-byte instruction, the first byte specifies the operation code and the second byte specifies the operand. Source operand is a data byte immediately following the opcode.
3. Three-Byte Instructions 8 (opcode) + 8 (operand LA) + 8(operand HA)
In a three-byte instruction, the first byte specifies the opcode, and the following two bytes specify the 16-bit address. Note that the second byte is the low-order address and the third byte is the high-order address
Types of Instructions in 8051 Microcontroller Instruction Set
The 8051 Microcontroller Instruction Set are divided into five groups. They are:
• Data Transfer Instructions
• Arithmetic Instructions
• Logical Instructions
• Boolean or Bit Manipulation Instructions
• Program Branching Instructions
Data Transfer Instructions
The Data Transfer Instructions are associated with transfer of data between registers or external program memory or external data memory. The Mnemonics associated with Data Transfer are given below.
• MOV
• MOVC
• MOVX
• PUSH
• POP
• XCH
• XCHD
For examples: Mov A, #Data
Mov A, Rn n=0-7
Mov A, Direct (Mov A,24H)
Mov Rn,#Data
Mov Rn,A
Mov Direct,Rn
Arithmetic Instructions
Using Arithmetic Instructions, you can perform addition, subtraction, multiplication and division. The arithmetic instructions also include increment by one, decrement by one and a special instruction called Decimal Adjust Accumulator.
The Mnemonics associated with the Arithmetic Instructions of the 8051 Microcontroller Instruction Set are:
• ADD
• ADDC
• SUBB
• INC
• DEC
• MUL
• DIV
• DA A
For examples: ADD A,#Data ADD A,#65H
ADD A,Rn ADD A,R7
ADD A,Direct
ADDC A,#Data
ADDC A,Rn
MUL AB
DIV AB
DEC A
DEC Rn
DEC Direct
INC A
Logical Instructions
The next group of instructions are the Logical Instructions, which perform logical operations like AND, OR, XOR, NOT, Rotate, Clear and Swap. Logical Instruction are performed on Bytes of data on a bit-by-bit basis. Mnemonics associated with Logical Instructions are as follows:
• ANL
• ORL
• XRL
• CLR
• CPL
• RL
• RLC
• RR
• RRC
• SWAP
For examples: ANL A,#Data
ANL A,Rn
ORL A,#Data
ORL A,Rn
XRL A,#Data
XRL A,Rn
CLR A
CPL A
RL A
RLC A Rotate acc left through carry
Boolean or Bit Manipulation Instructions
As the name suggests, Boolean or Bit Manipulation Instructions will deal with bit variables. We know that there is a special bit-addressable area in the RAM and some of the Special Function Registers (SFRs) are also bit addressable.
The Mnemonics corresponding to the Boolean or Bit Manipulation instructions are:
• CLR
• SETB
• MOV
• JC
• JNC
• JB
• JNB
• JBC
For examples: CLR A A=0
SET B
CPL A
JC (Jump if carry is set)
JNC (Jump if carry is not set)
JB
JNB
JBC (Jump if bit is set and clear bit)
Program Branching Instructions
The last group of instructions in the 8051 Microcontroller Instruction Set are the Program Branching Instructions. These instructions control the flow of program logic. The mnemonics of the Program Branching Instructions are as follows.
• LJMP
• AJMP
• SJMP
• JZ
• JNZ
• CJNE
• DJNZ
• NOP
• LCALL
• ACALL
• RET
• RETI
• JMP
Note:
The call and jump instructions are used to avoid the code replication of the program. When some specific code used more than once in different places in the program, if we mention specific name to code then we could use that name anywhere in the program without entering a code for every time.
For example: ACALL Absolute Subroutine call
LCALL Long Subroutine call
RET Return from subroutine
RETI Return from interrupt
JZ
JNZ
DJNZ
NOP
TIMERS OF 8051
The 8051 has two counters/timers which can be used either as timer to generate a time delay or as counter to count events happening outside the microcontroller.
The 8051 has two timers: timer0 and timer1.
They can be used either as timers or as counters. Both timers are 16 bits wide. Since the 8051 has an 8-bit architecture, each 16-bit is accessed as two separate registers of low byte and high byte.
Timer0 registers is a 16 bit register and accessed as low byte and high byte. The low byte is referred as a TL0 and the high byte is referred as TH0. These registers can be accessed like any other registers.
Timer1 registers is also a 16 bits register and is split into two bytes, referred to as TL1 and TH1.
TMOD (timer mode) Register:
This is an 8-bit register which is used by both timers 0 and 1 to set the various timer modes. In this TMOD register, lower 4 bits are set aside for timer0 and the upper 4 bits are set aside for timer1. In each case, the lower 2 bits are used to set the timer mode and upper 2 bits to specify the operation
In upper or lower 4 bits, first bit is a GATE bit. Every timer has a means of starting and stopping. The hardware way of starting and stopping the timer by an external source is achieved by making GATE=1 in the TMOD register. And if we change to GATE=0 then we do not need external hardware to start and stop the timers.
The second bit is C/T bit and is used to decide whether a timer is used as a time delay generator or an event counter. If this bit is 0 then it is used as a timer and if it is 1 then it is used as a counter.
In upper or lower 4 bits, the last bits third and fourth are known as M1 and M0 respectively. These are used to select the timer mode.
Mode 1- It is a 16-bit timer; therefore it allows values from 0000 to FFFFH to be loaded into the timer’s registers TL and TH. After TH and TL are loaded with a 16-bit initial value, the timer must be started.
Mode0- Mode 0 is exactly same like mode 1 except that it is a 13-bit timer instead of 16-bit. The 13- bit counter can hold values between 0000 to 1FFFH in TH-TL. Therefore, when the timer reaches its maximum of 1FFH, it rolls over to 0000, and TF is raised.
Mode 2- It is an 8 bit timer that allows only values of 00 to FFH to be loaded into the timer’s register TH. After TH is loaded with 8 bit value, the 8051 gives a copy of it to TL. Then the timer must be started.
Mode3- Mode 3 is also known as a split timer mode. Timer 0 and 1 may be programmed to be in mode 0, 1 and 2 independently of similar mode for other timer. This is not true for mode 3; timers do not operate independently if mode 3 is chosen for timer 0.
TCON register-
Bits and symbol and functions of every bits of TCON are as follows:
Interrupts of 8051:
Interrupts are basically the events that temporarily suspend the main program, pass the control to the external sources and execute their task. It then passes the control to the main program where it had left off.
8051 has five interrupts. These interrupts are INT0, INT1, TO, T1, TI/RI. All of the interrupts can be enabled or disabled by using the IE (interrupt enable) register. The interrupt addresses of these interrupts are like below
Interrupt Enable (IE) Register
This register can be used to enable or disable interrupts programmatically. This register is an SFR. The address is A8H. This byte is bit addressable. So it can be programmed by the user. The bits in this register has a different meaning. The register structure looks like this:
Now, let us see the bit details and different operations when the value is low (0) and high (1).
Interrupt Priority (IP) Register
All of these five interrupts can be in one or two interrupt level. The priority levels are level 1 and level 0. Priority level 1 indicates the higher priority, and level 0 indicates lower priority. This IP register can be used to store the priority levels for each interrupt. This is also a bit addressable SFR.
Now, let us see the bit details and different operations when the value is low (0) and high(1).
When all of the five interrupts are in same priority level, and if all of the interrupts are enabled, then the sequence of interrupts will be INT0, T0, INT1, T1, TI/RI.
SERIAL COMMUNICATION IN 8051
Microcontrollers can communicate data in either parallel form or serial form. In parallel communication, data is transferred parallely. On the other hand in serial communication, data is transferred in bit by bit manner over a single wire.
Parallel data Transmission
Serial Data Transmission
In serial communication parallel to serial converter and serial to parallel converter module is required. In 8051 in built UART (Universal Asynchronous Receiver Transmitter) module performs the job of serial communication of data.
SBUF (Serial buffer register)
It is an 8-bit register and is used for serial communication of data in 8051 microcontroller. Whatever data is required to be transmitted via TXD line must be placed in the SBUF register. Similarly the received data via RXD line is saved in SBUF register. When data is written to SBUF register then it is framed in b/w start and stop bit before it is transmitted via TXD line and similarly during reception of data start and stop bits are removed and actual data bits are extracted from the received frame and then it is placed in the SBUF register.
SCON (Serial Control)
The serial ports can be used either Transmitting mode or reception mode. The interrupt status for the Transmission is provided by TI, and status for Reception is provided by RI. These are two bits of SCON (Serial Control). This is also a bit addressable SFR. The Serial Control or SCON SFR is used to control the 8051 Microcontroller’s Serial Port. Using SCON, you can control the Operation Modes of the Serial Port, Baud Rate of the Serial Port and Send or Receive Data using Serial Port.
The significance of these bits are as follows
SM0, SM1: These two bits of SCON register determine the framing of data by specifying the number of bits per character and start bit and stop bits. There are 4 serial modes.
REN (Receive Enable): When it is high, it allows the 8051 to receive data on the RxD pin. So to receive and transfer data REN must be set to 1.When REN=0, the receiver is disabled. This is achieved as below
SETB SCON.4
& CLR SCON.4
TI (Transmit interrupt): When 8051 finishes the transfer of 8-bit character, it raises the TI flag to indicate that it is ready to transfer another byte. The TI bit is raised at the beginning of the stop bit.
RI (Receive interrupt): When the 8051 receives data serially via RxD, it gets rid of the start and stop bits and places the byte in the SBUF register. Then it raises the RI flag bit to indicate that a byte has been received and should be picked up before it is lost.
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